(A) static
(B) const
(C) friend
(D) private
Category: Digital Logic Design Mcqs
Digital Logic Design Mcqs for Screening tests, Interviews, Viva and Other competitive exams. DLD Mcqs section will help users to prepare mcqs of DLD for various exams. Aspirants of Lecturer Computer Science, SST Computer Science, Subject Specialist Computer Science, Data Entry operator, Computer Programmer, Computer Operator, Software engineer and all other Competitive Exams can prepare their Digital Logic Design portion from here.
The boolean expression A + B’ + C is?
(A) a sum term
(B) a literal term
(C) a product term
(D) a complemented term
If two adjacent 1s are detected in the input, the output is set to high?
(A) 0011
(B) 0101
(C) 1100
(D) 1010
A modulus-14 counter has fourteen states requiring__.
(A) 14 Flip Flops
(B) 14 Registers
(C) 4 Flip Flops
(D) 4 Registers
Karnaugh map is used in designing?
(A) a clock
(B) a counter
(C) an UP/DOWN counter
(D) All of the above
A 4-bit binary UP/DOWN counter is in the binary state zero. the next state in the DOWN mode is__.
(A) 0001
(B) 1111
(C) 1000
(D) 1110
If a circuit suffers “Clock Skew “ problem, the output of circuit can’t be guarantied?
(A) True
(B) False
(C) Both
(D) None
The bolean expression A + BC equals?
(A) (A’ + B)(A’ + C)
(B) (A + B)(A + C)
(C) (A + B)(A’ + C)
(D) none of the above