(A) The organization of memory
(B) The structure of memory
(C) The size of decoding unit
(D) The size of the address bus of the microprocessor
Category: Digital Logic Design Mcqs
Digital Logic Design Mcqs for Screening tests, Interviews, Viva and Other competitive exams. DLD Mcqs section will help users to prepare mcqs of DLD for various exams. Aspirants of Lecturer Computer Science, SST Computer Science, Subject Specialist Computer Science, Data Entry operator, Computer Programmer, Computer Operator, Software engineer and all other Competitive Exams can prepare their Digital Logic Design portion from here.
The three fundamental gates are __?
(A) AND, NAND, XOR
(B) OR, AND, NAND
(C) NOT, NOR, XOR
(D) NOT, OR, AND
__ is used to simplify the circuit that determines the next state?
(A) State diagram
(B) Next state table
(C) State reduction
(D) State assignment
In a state diagram, the transition from a current state to the next state is determined by?
(A) Current state and the inputs
(B) Current state and outputs
(C) Previous state and inputs
(D) Previous state and outputs
__occurs when the same clock signal arrives at different times at different clock inputs due to propagation delay?
(A) Race condition
(B) Clock Skew
(C) Ripple Effect
(D) None of given options
__ is one of the examples of synchronous inputs?
(A) J-K input
(B) EN input
(C) Preset input (PRE)
(D) Clear Input (CLR)
Addition of two octal numbers “36” and “71” results in__?
(A) 213
(B) 123
(C) 127
(D) 345
LUT is acronym for __ Look Up Table?
(A) Local User Terminal
(B) Least Upper Time Period
(C) Look Up Table
(D) None of given options