(A) Reconfiguration Counter Output
(B) Reconfiguration Clock Output
(C) Ripple Counter Output
(D) Ripple Clock Output
Tag: Digital Logic Design Solved Mcqs
The low to high or high to low transition of the clock is considered to be a(n)__.
(A) State
(B) Edge
(C) Trigger
(D) One-shot
If the S and R inputs of the gated S-R latch are connected together using a __gate then there is only a single input to the latch. The input is represented by D instead of S or R (A gated D-Latch).
(A) AND
(B) OR
(C) NOT
(D) XOR
3-to-8 decoder can be used to implement Standard SOP and POS Boolean expressions?
(A) True
(B) False
(C) Both
(D) None
The __ Encoder is used as a keypad encoder.
(A) 2-to-8 encoder
(B) 4-to-16 encoder
(C) BCD-to-Decimal
(D) Decimal-to-BCD Priority
The simplest and most commonly used Decoders are the __ Decoders.
(A) n to 2n
(B) (n-1) to 2n
(C) (n-1) to (2n-1)
(D) n to 2n-1
The output of an XOR gate is zero (0) when __ I) All the inputs are zero II) Any of the inputs is zero III) Any of the inputs is one IV) All the inputs are one.
(A) I Only
(B) IV Only
(C) I and IV only
(D) II and III only
Caveman number system is Base __ number system.
(A) 2
(B) 5
(C) 10
(D) 16