(A) Q2:= Q1 $ X $ Q3
(B) Q2:= Q1 # X # Q3
(C) Q2:= Q1 & X & Q3
(D) Q2:= Q1 ! X ! Q3
Tag: Digital Logic Design Solved Mcqs
If the FIFO Memory output is already filled with data then__.
(A) It is locked; no data is allowed to enter
(B) It is not locked; the new data overwrites the previous data
(C) Previous data is swapped out of memory and new data enters
(D) None of given options
In the following statement( Z PIN 20 ISTYPE „reg.invert‟;) The keyword “reg.invert” indicates __.
(A) An inverted register input
(B) An inverted register input at pin 20
(C) Active-high Registered Mode output
(D) Active-low Registered Mode output
In __ outputs depend only on the combination of current state and inputs.
(A) Mealy machine
(B) Moore Machine
(C) State Reduction table
(D) State Assignment table
For a gated D-Latch if EN=1 and D=1 then Q(t+1) =__.
(A) 0
(B) 1
(C) Q(t)
(D) Invalid
The ABEL symbol for “OR” operation is?
(A) !
(B) &
(C) #
(D) $
The capability that allows the PLDs to be programmed after they have been installed on a circuit board is called__.
(A) Radiation-Erase programming method (REPM)
(B) In-System Programming (ISP)
(C) In-chip Programming (ICP)
(D) Electronically-Erase programming method(EEPM)
Consider A=1,B=0,C=1. A, B and C represent the input of three bit NAND gate the output of the NAND gate will be __.
(A) Zero
(B) One
(C) Undefined
(D) No output as input is invalid