(A) ONLY A SINGLE MOD-12 COUNTER IS REQUIRED
(B) MOD-10 AND MOD-6 COUNTERS
(C) MOD-10 AND MOD-2 COUNTERS
(D) A SINGLE DECADE COUNTER AND A FLIP-FLOP
Tag: Digital Logic Design Solved Mcqs
The design and implementation of synchronous counters start from __.
(A) Truth table
(B) k-map
(C) state table
(D) state diagram
THE GLITCHES DUE TO RACE CONDITION CAN BE AVOIDED BY USING A __.
(A) GATED FLIP-FLOPS
(B) PULSE TRIGGERED FLIP-FLOPS
(C) POSITIVE-EDGE TRIGGERED FLIP-FLOPS
(D) NEGATIVE-EDGE TRIGGERED FLIP-FLOPS
A full-adder has a Cin = 0. What are the sum ( ) and the carry (Cout) when A = 1 and B = 1?
(A) = 0, Cout = 0
(B) = 0, Cout = 1
(C) = 1, Cout = 0
(D) = 1, Cout = 1
Bi-stable devices remain in either of their __ states unless the inputs force the device to switch its state?
(A) Ten
(B) Eight
(C) Three
(D) Two
The __ of a ROM is the time it takes for the data to appear at the Data Output of the ROM chip after an address is applied at the address input lines?
(A) Write Time
(B) Recycle Time
(C) Refresh Time
(D) Access Time
In __ Q output of the last flip-flop of the shift register is connected to the data input of the first flip-flop of the shift register?
(A) Moore machine
(B) Meally machine
(C) Johnson counter
(D) Ring counter
A counter is implemented using three (3) flip-flops, possibly it will have __ maximum output status?
(A) 3
(B) 7
(C) 8
(D) 15